{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8497534","patent":{"patent_number":"US-8497534","title":"Chip package with heavily doped regions and fabrication method thereof","assignee":null,"inventors":[],"filing_date":"2010-05-26T00:00:00.000Z","publication_date":"2013-07-30T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":17,"abstract":"The invention provides a chip package and fabrication method thereof. In one embodiment, the chip package includes: a semiconductor substrate having opposite first and second surfaces, at least one bond pad region and at least one device region; a plurality of conductive pad structures disposed on the bond pad region at the first surface of the semiconductor substrate; a plurality of heavily doped regions isolated from one another, underlying and electrically connected to the conductive pad structures; and a plurality of conductive bumps underlying the heavily doped regions and electrically connected to the conductive pad structures through the heavily-doped regions."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Chip package with heavily doped regions and fabrication method thereof","description":"The invention provides a chip package and fabrication method thereof. In one embodiment, the chip package includes: a semiconductor substrate having opposite first and second surfaces, at least one bo","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8497534","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8497534","citation_suggestion":"Patentable. \"Chip package with heavily doped regions and fabrication method thereof\" (US-8497534). https://patentable.app/patents/US-8497534","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8497534","json":"https://patentable.app/api/llm-context/US-8497534","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T15:39:06.241Z"}