{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8498142","patent":{"patent_number":"US-8498142","title":"Resistance change memory","assignee":null,"inventors":[],"filing_date":"2011-03-25T00:00:00.000Z","publication_date":"2013-07-30T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":23,"abstract":"A memory includes memory cells each includes a resistance change element and a diode, and each memory cell between one of row lines and one of column lines, a first decoder which selects one of the row lines as a selected row line, a second decoder which selects one of the column lines as a selected column line, a voltage pulse generating circuit which generates a voltage pulse, a voltage pulse shaping circuit which makes a rise time and a fall time of the voltage pulse longer, and a control circuit which applies the voltage pulse outputting from the voltage pulse shaping circuit to unselected column lines except the selected column line, and which applies a fixed potential to unselected row lines except the selected row line, in a data writing to a memory cell which is provided between the selected row line and the selected column line."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Resistance change memory","description":"A memory includes memory cells each includes a resistance change element and a diode, and each memory cell between one of row lines and one of column lines, a first decoder which selects one of the ro","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8498142","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8498142","citation_suggestion":"Patentable. \"Resistance change memory\" (US-8498142). https://patentable.app/patents/US-8498142","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8498142","json":"https://patentable.app/api/llm-context/US-8498142","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T21:10:12.487Z"}