{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8498154","patent":{"patent_number":"US-8498154","title":"Systems and methods for improving error distributions in multi-level cell memory systems","assignee":null,"inventors":[],"filing_date":"2012-05-14T00:00:00.000Z","publication_date":"2013-07-30T00:00:00.000Z","cpc_codes":["G11C","G06F","G11C","G11C","G11C"],"num_claims":10,"abstract":"A memory system includes a state set module that provides a first state set having a plurality of states, each being assigned to represent a particular data sequence, and a second state set having a same number of states as the first state set, wherein an assignment of one or more particular data sequences among the states of the second state set is different relative to that set forth in the first state set. The memory system further includes a write module that writes first data to a first multi-level memory cell of the memory system based on the first state set, the first multi-level cell being located on a wordline of the memory system, and that writes second data to a second multi-level memory cell of the memory system based on the second state set, the second multi-level cell being located on the wordline of the memory system."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Systems and methods for improving error distributions in multi-level cell memory systems","description":"A memory system includes a state set module that provides a first state set having a plurality of states, each being assigned to represent a particular data sequence, and a second state set having a s","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8498154","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8498154","citation_suggestion":"Patentable. \"Systems and methods for improving error distributions in multi-level cell memory systems\" (US-8498154). https://patentable.app/patents/US-8498154","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8498154","json":"https://patentable.app/api/llm-context/US-8498154","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:46:37.760Z"}