{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8498855","patent":{"patent_number":"US-8498855","title":"Circuit simulation based on gate spacing from adjacent MOS transistors","assignee":null,"inventors":[],"filing_date":"2009-09-25T00:00:00.000Z","publication_date":"2013-07-30T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":20,"abstract":"A circuit simulation apparatus is provided with a parameter calculating tool and a circuit simulator. The parameter calculating tool is configured to extract gate spacings between gates of a target MOS transistor and adjacent MOS transistors integrated in an integrated circuit from layout data of the integrated circuit, and to calculate a transistor model parameter corresponding to a threshold voltage of the target MOS transistor based on the extracted gate spacings. The circuit simulator is configured to perform circuit simulation of the integrated circuit by using the calculated transistor model parameter."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Circuit simulation based on gate spacing from adjacent MOS transistors","description":"A circuit simulation apparatus is provided with a parameter calculating tool and a circuit simulator. The parameter calculating tool is configured to extract gate spacings between gates of a target MO","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8498855","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8498855","citation_suggestion":"Patentable. \"Circuit simulation based on gate spacing from adjacent MOS transistors\" (US-8498855). https://patentable.app/patents/US-8498855","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8498855","json":"https://patentable.app/api/llm-context/US-8498855","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T08:38:28.842Z"}