{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8499163","patent":{"patent_number":"US-8499163","title":"Serial architecture for high assurance processing","assignee":null,"inventors":[],"filing_date":"2010-02-26T00:00:00.000Z","publication_date":"2013-07-30T00:00:00.000Z","cpc_codes":["H04L","H04L"],"num_claims":20,"abstract":"A processing system (60) includes an input interface (62), a first processor (64), a second processor (66), and an output interface (68) arranged in a serial configuration. Each of the input interface (62), first processor (64), second processor (66), and output interface (68) computes a digest (92, 100, 110, and 114) using information, e.g., a unique parameter (94, 102, 112, 118), known only by that element (62, 64, 66, 68) and using information generated by that element (62, 64, 66, 68). The digests (92, 100, 110, and 114) are used to validate the integrity of payload data (86) processed by the system (60) to form processed data (104) and the system (60) only outputs the processed data (104) upon validation of data integrity. The serial configuration of system (60) may be implemented to provide high bit rate, redundant cryptographic services."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Serial architecture for high assurance processing","description":"A processing system (60) includes an input interface (62), a first processor (64), a second processor (66), and an output interface (68) arranged in a serial configuration. Each of the input interface","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8499163","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8499163","citation_suggestion":"Patentable. \"Serial architecture for high assurance processing\" (US-8499163). https://patentable.app/patents/US-8499163","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8499163","json":"https://patentable.app/api/llm-context/US-8499163","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T15:36:04.989Z"}