{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8499302","patent":{"patent_number":"US-8499302","title":"Advanced processor with mechanism for packet distribution at high line rate","assignee":null,"inventors":[],"filing_date":"2011-09-06T00:00:00.000Z","publication_date":"2013-07-30T00:00:00.000Z","cpc_codes":["H04L","G06F"],"num_claims":20,"abstract":"An advanced processor comprises a plurality of multithreaded processor cores each having a data cache and instruction cache. A data switch interconnect is coupled to each of the processor cores and configured to pass information among the processor cores. A messaging network is coupled to each of the processor cores and a plurality of communication ports. In one aspect of an embodiment of the invention, the data switch interconnect is coupled to each of the processor cores by its respective data cache, and the messaging network is coupled to each of the processor cores by its respective message station. Advantages of the invention include the ability to provide high bandwidth communications between computer systems and memory in an efficient and cost-effective manner."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Advanced processor with mechanism for packet distribution at high line rate","description":"An advanced processor comprises a plurality of multithreaded processor cores each having a data cache and instruction cache. A data switch interconnect is coupled to each of the processor cores and co","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8499302","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8499302","citation_suggestion":"Patentable. \"Advanced processor with mechanism for packet distribution at high line rate\" (US-8499302). https://patentable.app/patents/US-8499302","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8499302","json":"https://patentable.app/api/llm-context/US-8499302","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:27:35.189Z"}