{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8502312","patent":{"patent_number":"US-8502312","title":"Configurations and methods for manufacturing charge balanced devices","assignee":null,"inventors":[],"filing_date":"2010-08-26T00:00:00.000Z","publication_date":"2013-08-06T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":10,"abstract":"This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of deep trenches. The deep trenches are filled with an epitaxial layer thus forming a top epitaxial layer covering areas above a top surface of the deep trenches covering over the semiconductor substrate. The semiconductor power device further includes a plurality of transistor cells disposed in the top epitaxial layer whereby a device performance of the semiconductor power device is dependent on a depth of the deep trenches and not dependent on a thickness of the top epitaxial layer. Each of the plurality of transistor cells includes a trench DMOS transistor cell having a trench gate opened through the top epitaxial layer and filled with a gate dielectric material."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Configurations and methods for manufacturing charge balanced devices","description":"This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of deep trenches. The deep trenches are filled with an epita","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8502312","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8502312","citation_suggestion":"Patentable. \"Configurations and methods for manufacturing charge balanced devices\" (US-8502312). https://patentable.app/patents/US-8502312","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8502312","json":"https://patentable.app/api/llm-context/US-8502312","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T21:47:14.266Z"}