{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8502563","patent":{"patent_number":"US-8502563","title":"Non-binary decoder architecture and control signal logic for reduced circuit complexity","assignee":null,"inventors":[],"filing_date":"2009-11-04T00:00:00.000Z","publication_date":"2013-08-06T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":13,"abstract":"A decoder for sequentially enabling outputs in response to clock signal inputs is described including X number of logic stages corresponding to X number of outputs of the decoder. Each of the logic stages has a plurality of inputs, wherein each logic stage includes fewer than log2X inputs for receiving the clock signal inputs."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Non-binary decoder architecture and control signal logic for reduced circuit complexity","description":"A decoder for sequentially enabling outputs in response to clock signal inputs is described including X number of logic stages corresponding to X number of outputs of the decoder. Each of the logic st","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8502563","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8502563","citation_suggestion":"Patentable. \"Non-binary decoder architecture and control signal logic for reduced circuit complexity\" (US-8502563). https://patentable.app/patents/US-8502563","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8502563","json":"https://patentable.app/api/llm-context/US-8502563","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T15:39:57.076Z"}