{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8503214","patent":{"patent_number":"US-8503214","title":"Semiconductor memory device","assignee":null,"inventors":[],"filing_date":"2011-02-25T00:00:00.000Z","publication_date":"2013-08-06T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C"],"num_claims":9,"abstract":"A semiconductor memory device provided with a new bit line hierarchization method that enables further reduction of power consumption is provided. The semiconductor memory device includes multiple memory blocks provided in a matrix configuration and multiple main bit lines provided in correspondence with the memory blocks. Each of the memory blocks includes: multiple memory cells provided in a matrix configuration; multiple sub bit lines provided on a column-by-column basis; multiple word lines provided with respect to each of columns and rows and common to multiple memory blocks; and a switch circuit that couples a corresponding main bit line to any of the sub bit lines. In the operation of reading a target cell as the target of read, a main bit line corresponding to the target cell is selected, a sub bit line corresponding to the column of the target cell is selected through the switch circuit; and a word line corresponding to the column and the row of the target cell is selected from among the word lines."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor memory device","description":"A semiconductor memory device provided with a new bit line hierarchization method that enables further reduction of power consumption is provided. The semiconductor memory device includes multiple mem","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8503214","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8503214","citation_suggestion":"Patentable. \"Semiconductor memory device\" (US-8503214). https://patentable.app/patents/US-8503214","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8503214","json":"https://patentable.app/api/llm-context/US-8503214","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T10:31:56.372Z"}