{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8503264","patent":{"patent_number":"US-8503264","title":"Reducing power consumption in a segmented memory","assignee":null,"inventors":[],"filing_date":"2011-11-18T00:00:00.000Z","publication_date":"2013-08-06T00:00:00.000Z","cpc_codes":["G11C"],"num_claims":8,"abstract":"A memory structure can include a first memory block including a plurality of memory cells corresponding to a first subset of addresses of a range of addresses and a second memory block including a plurality of memory cells corresponding to a second subset of addresses of the range of addresses. The memory structure can include control circuitry coupled to the first memory block and the second memory block and configured to provide control signals to the first memory block and the second memory block. The first memory block and the second memory block can be configured to implement a reduced power mode independently of one another responsive to the control signals."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Reducing power consumption in a segmented memory","description":"A memory structure can include a first memory block including a plurality of memory cells corresponding to a first subset of addresses of a range of addresses and a second memory block including a plu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8503264","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8503264","citation_suggestion":"Patentable. \"Reducing power consumption in a segmented memory\" (US-8503264). https://patentable.app/patents/US-8503264","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8503264","json":"https://patentable.app/api/llm-context/US-8503264","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T20:34:50.259Z"}