{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8504883","patent":{"patent_number":"US-8504883","title":"System and method for testing integrated circuits","assignee":null,"inventors":[],"filing_date":"2010-08-25T00:00:00.000Z","publication_date":"2013-08-06T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C"],"num_claims":18,"abstract":"A method of testing a semiconductor memory device includes reading previously written test data from the semiconductor memory device simultaneously through at least two data I/O connections, e.g., pins or pads, of the semiconductor memory device. The signals from the two data I/O connections are combined to produce a compound output signal. The compound output signal is received by a single I/O channel of a tester. The tester compares the compound output signal to a predetermined voltage level, and determines whether the semiconductor memory device is operating properly based on the comparison of the compound output signal to the predetermined voltage level."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"System and method for testing integrated circuits","description":"A method of testing a semiconductor memory device includes reading previously written test data from the semiconductor memory device simultaneously through at least two data I/O connections, e.g., pin","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8504883","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8504883","citation_suggestion":"Patentable. \"System and method for testing integrated circuits\" (US-8504883). https://patentable.app/patents/US-8504883","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8504883","json":"https://patentable.app/api/llm-context/US-8504883","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T11:13:39.725Z"}