{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8504978","patent":{"patent_number":"US-8504978","title":"User interface for timing budget analysis of integrated circuit designs","assignee":null,"inventors":[],"filing_date":"2009-05-07T00:00:00.000Z","publication_date":"2013-08-06T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":29,"abstract":"In one embodiment of the invention, a method includes reading an automatically generated timing budgeting file, including timing budget information for a plurality of partitions of an integrated circuit design; graphically displaying a time budgeting debug window on a display device; and graphically displaying a timing budget analyzer window on the display device in response to selection of a selected signal path in a path list window pane. The timing budget analyzer window graphically displays timing budgets and timing delays of a selected path for visual comparison. The time budgeting debug window includes a button with a path category menu to display one or more signal paths meeting a selected path category, and a path list window pane to display a list of one or more signal paths through one or more ports of the plurality of partitions in response to the selected path category in the path category menu."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"User interface for timing budget analysis of integrated circuit designs","description":"In one embodiment of the invention, a method includes reading an automatically generated timing budgeting file, including timing budget information for a plurality of partitions of an integrated circu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8504978","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8504978","citation_suggestion":"Patentable. \"User interface for timing budget analysis of integrated circuit designs\" (US-8504978). https://patentable.app/patents/US-8504978","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8504978","json":"https://patentable.app/api/llm-context/US-8504978","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:45:57.011Z"}