{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8507378","patent":{"patent_number":"US-8507378","title":"Method and structure for self aligned contact for integrated circuits","assignee":null,"inventors":[],"filing_date":"2010-07-30T00:00:00.000Z","publication_date":"2013-08-13T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L"],"num_claims":16,"abstract":"A high voltage integrated circuit device includes a semiconductor substrate having a surface region with a contact region, which is coupled to a source/drain region. The device has a plasma enhanced oxide overlying the surface region, a stop layer overlying the plasma enhanced oxide, and a contact opening through a portion of the stop layer and through a portion of the plasma enhanced oxide layer. The contact opening exposes a portion of the contact region without damaging it. The device has a silicide layer overlying the contact region to form a silicided contact region and an interlayer dielectric overlying the silicided contact region to fill the contact opening and provide a thickness of material overlying the stop layer. An opening in the interlayer dielectric layer is formed through a portion of the thickness to expose a portion of the silicided contact region and expose a portion of the stop layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and structure for self aligned contact for integrated circuits","description":"A high voltage integrated circuit device includes a semiconductor substrate having a surface region with a contact region, which is coupled to a source/drain region. The device has a plasma enhanced o","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8507378","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8507378","citation_suggestion":"Patentable. \"Method and structure for self aligned contact for integrated circuits\" (US-8507378). https://patentable.app/patents/US-8507378","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8507378","json":"https://patentable.app/api/llm-context/US-8507378","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:38:03.515Z"}