{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8507989","patent":{"patent_number":"US-8507989","title":"Extremely thin semiconductor-on-insulator (ETSOI) FET with a back gate and reduced parasitic capacitance","assignee":null,"inventors":[],"filing_date":"2011-05-16T00:00:00.000Z","publication_date":"2013-08-13T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":17,"abstract":"An extremely thin SOI MOSFET device on an SOI substrate is provided with a back gate layer on a Si substrate superimposed by a thin BOX layer; an extremely thin SOI layer (ETSOI) on top of the thin BOX layer; and an FET device on the ETSOI layer having a gate stack insulated by spacers. The thin BOX is formed under the ETSOI channel, and is provided with a thicker dielectric under source and drain to reduce the source/drain to back gate parasitic capacitance. The thicker dielectric portion is self-aligned with the gate. A void within the thicker dielectric portion is formed under the source/drain region. The back gate is determined by a region of semiconductor damaged by implantation, and the formation of an insulating layer by lateral etch and back filling with dielectric."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Extremely thin semiconductor-on-insulator (ETSOI) FET with a back gate and reduced parasitic capacitance","description":"An extremely thin SOI MOSFET device on an SOI substrate is provided with a back gate layer on a Si substrate superimposed by a thin BOX layer; an extremely thin SOI layer (ETSOI) on top of the thin BO","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8507989","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8507989","citation_suggestion":"Patentable. \"Extremely thin semiconductor-on-insulator (ETSOI) FET with a back gate and reduced parasitic capacitance\" (US-8507989). https://patentable.app/patents/US-8507989","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8507989","json":"https://patentable.app/api/llm-context/US-8507989","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T20:05:20.510Z"}