{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8508515","patent":{"patent_number":"US-8508515","title":"Buffering circuit with reduced dynamic power consumption","assignee":null,"inventors":[],"filing_date":"2009-08-05T00:00:00.000Z","publication_date":"2013-08-13T00:00:00.000Z","cpc_codes":["G09G","G09G","G09G","G09G"],"num_claims":21,"abstract":"A buffering circuit with reduced power consumption is provided. The output buffering circuit includes first and second amplifier circuits. The first amplifier circuit includes a first input stage and a first output stage both coupled between a first power voltage and a second power voltage lower than the first power voltage, and an assistant discharging unit configured to provide a discharging current flowing from a first output node to a first intermediate power voltage during a discharging operation of the first amplifier circuit. The second amplifier circuit includes a second input stage and a second output stage both coupled between the first power voltage and the second power voltage, and an assistant charging unit configured to provide a charging current flowing from a second intermediate power voltage to a second output node during a charging operation of the second amplifier circuit. The first and second amplifier circuits can have reduced output voltage ranges and hence reduced total power consumption."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Buffering circuit with reduced dynamic power consumption","description":"A buffering circuit with reduced power consumption is provided. The output buffering circuit includes first and second amplifier circuits. The first amplifier circuit includes a first input stage and ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8508515","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8508515","citation_suggestion":"Patentable. \"Buffering circuit with reduced dynamic power consumption\" (US-8508515). https://patentable.app/patents/US-8508515","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8508515","json":"https://patentable.app/api/llm-context/US-8508515","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T01:34:12.327Z"}