{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8509012","patent":{"patent_number":"US-8509012","title":"Precharge signal generation circuit of semiconductor memory apparatus","assignee":null,"inventors":[],"filing_date":"2011-06-29T00:00:00.000Z","publication_date":"2013-08-13T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C"],"num_claims":14,"abstract":"A precharge signal generation circuit of a semiconductor memory apparatus may comprise a read/write precharge command generation section configured to delay a precharge command by a first delay time set in response to a control signal to generate one of a read precharge command and a write precharge command; and a read/write bank precharge address generation section configured to delay a bank column address strobe signal by a second delay time set in response to the precharge command delayed in the read/write precharge command generation section, and generate one of a read bank precharge address and a write bank precharge address."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Precharge signal generation circuit of semiconductor memory apparatus","description":"A precharge signal generation circuit of a semiconductor memory apparatus may comprise a read/write precharge command generation section configured to delay a precharge command by a first delay time s","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8509012","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8509012","citation_suggestion":"Patentable. \"Precharge signal generation circuit of semiconductor memory apparatus\" (US-8509012). https://patentable.app/patents/US-8509012","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8509012","json":"https://patentable.app/api/llm-context/US-8509012","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T11:10:46.103Z"}