{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8510503","patent":{"patent_number":"US-8510503","title":"Ring buffer circuit and control circuit for ring buffer circuit","assignee":null,"inventors":[],"filing_date":"2010-01-06T00:00:00.000Z","publication_date":"2013-08-13T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F"],"num_claims":17,"abstract":"Provided are a ring buffer circuit in which a data full state and a data empty state may be correctly detected without depending on whether read and write operations are synchronous or asynchronous with each other, and a control circuit for the ring buffer circuit. The ring buffer circuit includes: a read and write memory having addresses specified by N bits; a write address counter pointer and a read address counter pointer which are provided for the read and write memory to count (N+1)-bit gray codes; and write and read address converter circuits provided to convert the (N+1)-bit gray codes output from the write and read address counter pointers into N-bit addresses which may be directly designated as write and read addresses of the read and write memory."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Ring buffer circuit and control circuit for ring buffer circuit","description":"Provided are a ring buffer circuit in which a data full state and a data empty state may be correctly detected without depending on whether read and write operations are synchronous or asynchronous wi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8510503","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8510503","citation_suggestion":"Patentable. \"Ring buffer circuit and control circuit for ring buffer circuit\" (US-8510503). https://patentable.app/patents/US-8510503","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8510503","json":"https://patentable.app/api/llm-context/US-8510503","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:27:19.335Z"}