{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8510632","patent":{"patent_number":"US-8510632","title":"Control method for a semiconductor memory device","assignee":null,"inventors":[],"filing_date":"2013-01-14T00:00:00.000Z","publication_date":"2013-08-13T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":14,"abstract":"To provide a memory array for information bit that stores information bits, a memory array for check bit that stores check bits, a correction circuit that, in response to a write request, reads the information bit and the check bit corresponding to a write address from the respective memory arrays and corrects an error included in the information bit, and a mixer temporarily holding information bit corrected by the correction circuit. The mixer overwrites only a part of bytes of the held information bits with write data according to a byte mask signal. Accordingly, a capacity required for the memory array for check bit can be reduced while the byte mask function is maintained."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Control method for a semiconductor memory device","description":"To provide a memory array for information bit that stores information bits, a memory array for check bit that stores check bits, a correction circuit that, in response to a write request, reads the in","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8510632","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8510632","citation_suggestion":"Patentable. \"Control method for a semiconductor memory device\" (US-8510632). https://patentable.app/patents/US-8510632","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8510632","json":"https://patentable.app/api/llm-context/US-8510632","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:59:30.879Z"}