{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8513675","patent":{"patent_number":"US-8513675","title":"Vertical junction field effect transistors having sloped sidewalls and methods of making","assignee":null,"inventors":[],"filing_date":"2012-05-21T00:00:00.000Z","publication_date":"2013-08-20T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":19,"abstract":"Semiconductor devices and methods of making the devices are described. The devices can be junction field-effect transistors (JFETs). The devices have raised regions with sloped sidewalls which taper inward. The sidewalls can form an angle of 5° or more from vertical to the substrate surface. The devices can have dual-sloped sidewalls in which a lower portion of the sidewalls forms an angle of 5° or more from vertical and an upper portion of the sidewalls forms an angle of <5° from vertical. The devices can be made using normal (i.e., 0°) or near normal incident ion implantation. The devices have relatively uniform sidewall doping and can be made without angled implantation."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Vertical junction field effect transistors having sloped sidewalls and methods of making","description":"Semiconductor devices and methods of making the devices are described. The devices can be junction field-effect transistors (JFETs). The devices have raised regions with sloped sidewalls which taper i","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8513675","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8513675","citation_suggestion":"Patentable. \"Vertical junction field effect transistors having sloped sidewalls and methods of making\" (US-8513675). https://patentable.app/patents/US-8513675","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8513675","json":"https://patentable.app/api/llm-context/US-8513675","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T15:53:43.068Z"}