{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8513820","patent":{"patent_number":"US-8513820","title":"Package substrate structure and chip package structure and manufacturing process thereof","assignee":null,"inventors":[],"filing_date":"2010-01-21T00:00:00.000Z","publication_date":"2013-08-20T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":7,"abstract":"A chip package structure includes a substrate, chips and an elastic element. The substrate has a first surface, a second surface, a first patterned metal layer on the first surface and a second patterned metal layer on the second surface, wherein the substrate is suitable for being clipped between an upper mold chase and a lower mold chase of a package mold. The chips are disposed on the first surface, wherein the chips are suitable for being contained in containing spaces defined by the upper mold chase and the substrate. The elastic element is disposed on the second surface and surrounds the second patterned metal layer, wherein the elastic element is suitable for contacting the lower mold chase and is located between the lower mold chase and the substrate. In addition, a manufacturing process of the chip package and a package substrate structure are also provided."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Package substrate structure and chip package structure and manufacturing process thereof","description":"A chip package structure includes a substrate, chips and an elastic element. The substrate has a first surface, a second surface, a first patterned metal layer on the first surface and a second patter","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8513820","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8513820","citation_suggestion":"Patentable. \"Package substrate structure and chip package structure and manufacturing process thereof\" (US-8513820). https://patentable.app/patents/US-8513820","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8513820","json":"https://patentable.app/api/llm-context/US-8513820","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:47:34.193Z"}