{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8513991","patent":{"patent_number":"US-8513991","title":"Delay-locked loop having a loop bandwidth dependency on phase error","assignee":null,"inventors":[],"filing_date":"2010-06-18T00:00:00.000Z","publication_date":"2013-08-20T00:00:00.000Z","cpc_codes":["G11C"],"num_claims":7,"abstract":"Circuits, methods, and apparatus that vary one or more attributes or parameters of a closed-loop clock circuit as a function of a characteristic of its phase error. One example provides a delay-locked loop having a loop bandwidth that can be varied as a function of its phase error. In this specific example, current phase error is determined. This determination may be made directly, either by measuring phase error, or indirectly, by determining if phase error is within one or more ranges of values. Once the phase error is determined, the loop bandwidth can be set. In one example, the loop bandwidth is set by adjusting the depth, type, or depth and type of the delay-locked loop's loop filter. In this way, large phase errors can be reduced quickly by increasing loop bandwidth, while small phase errors can be used to decrease loop bandwidth, thereby improving jitter performance."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Delay-locked loop having a loop bandwidth dependency on phase error","description":"Circuits, methods, and apparatus that vary one or more attributes or parameters of a closed-loop clock circuit as a function of a characteristic of its phase error. One example provides a delay-locked","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8513991","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8513991","citation_suggestion":"Patentable. \"Delay-locked loop having a loop bandwidth dependency on phase error\" (US-8513991). https://patentable.app/patents/US-8513991","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8513991","json":"https://patentable.app/api/llm-context/US-8513991","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:13:50.536Z"}