{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8514874","patent":{"patent_number":"US-8514874","title":"Thread synchronization in a multi-thread network communications processor  architecture","assignee":null,"inventors":[],"filing_date":"2010-12-22T00:00:00.000Z","publication_date":"2013-08-20T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","H04L"],"num_claims":10,"abstract":"Described embodiments provide a packet classifier for a network processor that generates tasks corresponding to each received packet. The packet classifier includes a scheduler to generate a thread of contexts for each task received by the packet classifier from a plurality of processing modules of the network processor. The scheduler includes one or more output queues to temporarily store contexts. Each thread corresponds to an order of instructions applied to the corresponding packet, and includes an identifier of a corresponding one of the output queues. The scheduler sends the contexts to a multi-thread instruction engine that processes the threads. An arbiter selects one of the output queues in order to provide output packets to the multi-thread instruction engine, the output packets associated with a corresponding thread of contexts. Each output queue transmits output packets corresponding to a given thread contiguously in the order in which the threads started."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Thread synchronization in a multi-thread network communications processor  architecture","description":"Described embodiments provide a packet classifier for a network processor that generates tasks corresponding to each received packet. The packet classifier includes a scheduler to generate a thread of","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8514874","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8514874","citation_suggestion":"Patentable. \"Thread synchronization in a multi-thread network communications processor  architecture\" (US-8514874). https://patentable.app/patents/US-8514874","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8514874","json":"https://patentable.app/api/llm-context/US-8514874","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:48:12.383Z"}