{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8516407","patent":{"patent_number":"US-8516407","title":"Methods for quantitatively evaluating the quality of double patterning technology-compliant layouts","assignee":null,"inventors":[],"filing_date":"2012-01-30T00:00:00.000Z","publication_date":"2013-08-20T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":19,"abstract":"A method for fabricating an integrated circuit is disclosed that includes, in accordance with an embodiment, providing a double patterning technology-compliant logical design for the integrated circuit, the logical design including a plurality of elements; scoring the design of one or more of the plurality of elements to produce a design score; modifying the design based at least in part on the design score; generating a mask set implementing the modified logical design; and employing the mask set to implement the logical design in and on a semiconductor substrate."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods for quantitatively evaluating the quality of double patterning technology-compliant layouts","description":"A method for fabricating an integrated circuit is disclosed that includes, in accordance with an embodiment, providing a double patterning technology-compliant logical design for the integrated circui","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8516407","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8516407","citation_suggestion":"Patentable. \"Methods for quantitatively evaluating the quality of double patterning technology-compliant layouts\" (US-8516407). https://patentable.app/patents/US-8516407","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8516407","json":"https://patentable.app/api/llm-context/US-8516407","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:46:47.366Z"}