{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8518753","patent":{"patent_number":"US-8518753","title":"Assembly method for three dimensional integrated circuit","assignee":null,"inventors":[],"filing_date":"2011-11-15T00:00:00.000Z","publication_date":"2013-08-27T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A method comprises attaching a first side of an interposer on a carrier wafer. The first side of the interposer comprises a plurality of bumps. The carrier wafer comprises a plurality of cavities formed in the carrier wafer. Each bump on the first side of the interposer can fit into its corresponding cavity on the carrier wafer. Subsequently, the method comprises attaching a semiconductor die on the second side of the interposer to form a wafer stack, detaching the wafer stack from the carrier wafer and attaching the wafer stack to a substrate."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Assembly method for three dimensional integrated circuit","description":"A method comprises attaching a first side of an interposer on a carrier wafer. The first side of the interposer comprises a plurality of bumps. The carrier wafer comprises a plurality of cavities form","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8518753","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8518753","citation_suggestion":"Patentable. \"Assembly method for three dimensional integrated circuit\" (US-8518753). https://patentable.app/patents/US-8518753","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8518753","json":"https://patentable.app/api/llm-context/US-8518753","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T21:55:05.744Z"}