{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8520427","patent":{"patent_number":"US-8520427","title":"Memory cell and memory array utilizing the memory cell","assignee":null,"inventors":[],"filing_date":"2012-02-03T00:00:00.000Z","publication_date":"2013-08-27T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C"],"num_claims":10,"abstract":"A memory cell comprising a first switch device, a second switch device and a capacitor is disclosed. The first switch device has: a control terminal coupled to a select line, wherein the first switch device is controlled by the select line; a first terminal, coupled to a bit line parallel with the select line. The second switch device has: a first terminal, coupled to the second terminal of the first switch device; a control terminal, coupled to a word line orthogonal to the bit line and the select line, wherein the second switch device is controlled by the word line. The capacitor has a first terminal coupled to the second terminal of the second switch device and a second terminal coupled to a predetermined voltage level, wherein the data is read from the capacitor or written to the capacitor via the bit line."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory cell and memory array utilizing the memory cell","description":"A memory cell comprising a first switch device, a second switch device and a capacitor is disclosed. The first switch device has: a control terminal coupled to a select line, wherein the first switch ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8520427","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8520427","citation_suggestion":"Patentable. \"Memory cell and memory array utilizing the memory cell\" (US-8520427). https://patentable.app/patents/US-8520427","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8520427","json":"https://patentable.app/api/llm-context/US-8520427","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:07:02.867Z"}