{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8520456","patent":{"patent_number":"US-8520456","title":"Semiconductor memory apparatus for reducing current consumption","assignee":null,"inventors":[],"filing_date":"2011-08-17T00:00:00.000Z","publication_date":"2013-08-27T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C"],"num_claims":31,"abstract":"A semiconductor memory apparatus may comprise: an input buffer block configured to receive a write signal and a reference level signal, compare a the write signal with a the reference level signal to generate a first write control signal, and delay the first write control signal by a predetermined time to generate a second write control signal; a first decoder block configured to combine the second write control signal inputted from the input buffer block with externally inputted command signals, and generate a first write command signal; a clock control block configured to generate a clock control signal for determining determine a level of an internal clock signal in response to a level of the first write control signal outputted from the input buffer block; and a write signal control block configured to generate an internal write command signal according to a level of the first write command signal inputted from the first decoder block and the clock control signal inputted from the clock control block."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor memory apparatus for reducing current consumption","description":"A semiconductor memory apparatus may comprise: an input buffer block configured to receive a write signal and a reference level signal, compare a the write signal with a the reference level signal to ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8520456","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8520456","citation_suggestion":"Patentable. \"Semiconductor memory apparatus for reducing current consumption\" (US-8520456). https://patentable.app/patents/US-8520456","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8520456","json":"https://patentable.app/api/llm-context/US-8520456","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T05:11:25.999Z"}