{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8525317","patent":{"patent_number":"US-8525317","title":"Integrated chip package having intermediate substrate with capacitor","assignee":null,"inventors":[],"filing_date":"2005-05-20T00:00:00.000Z","publication_date":"2013-09-03T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":21,"abstract":"An integrated chip package includes at least one semiconductor chip. The at least one semiconductor chip includes a first surface and a second surface. The integrated chip package includes an intermediate substrate. The intermediate substrate is electrically coupled via conductive bumps to the first surface of the at least one semiconductor chip. The intermediate substrate includes at least one capacitor electrically coupled to the at least one semiconductor chip. The at least one capacitor includes a trench capacitor. The integrated chip package includes a package substrate. The package substrate includes a first surface electrically coupled to the intermediate substrate via a plurality of bonding wires."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integrated chip package having intermediate substrate with capacitor","description":"An integrated chip package includes at least one semiconductor chip. The at least one semiconductor chip includes a first surface and a second surface. The integrated chip package includes an intermed","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8525317","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8525317","citation_suggestion":"Patentable. \"Integrated chip package having intermediate substrate with capacitor\" (US-8525317). https://patentable.app/patents/US-8525317","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8525317","json":"https://patentable.app/api/llm-context/US-8525317","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T12:44:37.908Z"}