{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8526228","patent":{"patent_number":"US-8526228","title":"8-transistor SRAM cell design with outer pass-gate diodes","assignee":null,"inventors":[],"filing_date":"2012-01-06T00:00:00.000Z","publication_date":"2013-09-03T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":20,"abstract":"An 8-transistor SRAM cell which includes two pull-up transistors and two pull-down transistors in cross-coupled inverter configuration for storing a single data bit; first and second pass-gate transistors having a gate terminal coupled to a write word line and a source or drain of each of the pass-gate transistors coupled to a write bit line through a series outer diode between the pass-gate and the write bit line oriented to block charge transfer from the write bit line into the cell; and first and second read transistors coupled to the two pull-up and two pull-down transistors, one of the read transistors having a gate terminal coupled to a read word line and a source or a drain coupled to a read bit line. The 8-transistor SRAM cell is adapted to prevent the value of the bit stored in the cell from changing state."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"8-transistor SRAM cell design with outer pass-gate diodes","description":"An 8-transistor SRAM cell which includes two pull-up transistors and two pull-down transistors in cross-coupled inverter configuration for storing a single data bit; first and second pass-gate transis","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8526228","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8526228","citation_suggestion":"Patentable. \"8-transistor SRAM cell design with outer pass-gate diodes\" (US-8526228). https://patentable.app/patents/US-8526228","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8526228","json":"https://patentable.app/api/llm-context/US-8526228","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:25:41.931Z"}