{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8526265","patent":{"patent_number":"US-8526265","title":"Three state word line driver for a DRAM memory device","assignee":null,"inventors":[],"filing_date":"2009-12-22T00:00:00.000Z","publication_date":"2013-09-03T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":17,"abstract":"A memory bank includes an array of memory cells, word lines for accessing the memory cells, and word line drivers coupled to the word lines. When the memory bank is being accessed, the word line drivers are coupled to receive a first supply voltage, which is applied to the non-selected word lines of the memory bank. The first supply voltage turns off access transistors of the memory cells coupled to the non-selected word lines. When the memory bank is not being accessed, the word line drivers are coupled to receive a second supply voltage, which is applied to each of the word lines of the memory bank. The second supply voltage turns off the access transistors of the memory cells coupled of the word lines. The first and second supply voltages are selected such that the first supply voltage turns off the access transistors harder than the second supply voltage."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Three state word line driver for a DRAM memory device","description":"A memory bank includes an array of memory cells, word lines for accessing the memory cells, and word line drivers coupled to the word lines. When the memory bank is being accessed, the word line drive","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8526265","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8526265","citation_suggestion":"Patentable. \"Three state word line driver for a DRAM memory device\" (US-8526265). https://patentable.app/patents/US-8526265","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8526265","json":"https://patentable.app/api/llm-context/US-8526265","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:46:55.222Z"}