{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8531897","patent":{"patent_number":"US-8531897","title":"Delay control circuit and semiconductor memory device including the same","assignee":null,"inventors":[],"filing_date":"2011-08-12T00:00:00.000Z","publication_date":"2013-09-10T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A delay control circuit includes a delay locked loop configured to delay an external clock by a first delay amount and generate an internal clock, a first delay unit configured to delay an input signal by a first delay amount, a first replica delay unit having a replica delay amount corresponding to a modeled delay amount of a system, a delay control unit configured to control the replica delay amount in response to a latency of an input signal, a measurement unit configured to measure the first delay amount and the controlled replica delay amount and generate path information, an operation unit configured to generate delay information in response to the latency of the input signal and the path information, and a latency delay unit configured to delay the delayed input signal of the first delay unit by the delay information and generate a latency signal."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Delay control circuit and semiconductor memory device including the same","description":"A delay control circuit includes a delay locked loop configured to delay an external clock by a first delay amount and generate an internal clock, a first delay unit configured to delay an input signa","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8531897","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8531897","citation_suggestion":"Patentable. \"Delay control circuit and semiconductor memory device including the same\" (US-8531897). https://patentable.app/patents/US-8531897","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8531897","json":"https://patentable.app/api/llm-context/US-8531897","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T08:35:03.291Z"}