{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8531908","patent":{"patent_number":"US-8531908","title":"Multi-phase duty-cycle corrected clock signal generator and memory having same","assignee":null,"inventors":[],"filing_date":"2012-01-25T00:00:00.000Z","publication_date":"2013-09-10T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":26,"abstract":"Memories, multi-phase clock signal generators, and methods for generating multi-phase duty cycle corrected clock signals are disclosed. For example, one such clock signal generator includes a delay-locked loop having a first multi-tap adjustable delay line configured to delay a reference signal to provide a plurality of clock signals having different phases relative to the reference clock signal. A periodic signal generated by the delay-locked loop is provided to a second multi-tap adjustable delay line as an input clock signal. Clock signals from taps of the second multi-tap adjustable delay line are provided as the multi-phase duty cycle corrected clock signals."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Multi-phase duty-cycle corrected clock signal generator and memory having same","description":"Memories, multi-phase clock signal generators, and methods for generating multi-phase duty cycle corrected clock signals are disclosed. For example, one such clock signal generator includes a delay-lo","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8531908","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8531908","citation_suggestion":"Patentable. \"Multi-phase duty-cycle corrected clock signal generator and memory having same\" (US-8531908). https://patentable.app/patents/US-8531908","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8531908","json":"https://patentable.app/api/llm-context/US-8531908","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T23:23:42.727Z"}