{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8532247","patent":{"patent_number":"US-8532247","title":"Integer and half clock step division digital variable clock divider","assignee":null,"inventors":[],"filing_date":"2011-09-28T00:00:00.000Z","publication_date":"2013-09-10T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":13,"abstract":"A clock divider divides a high speed input clock signal by an odd, even or fractional divide ratio. The clock divider receives a divide factor value F representative of a divide ratio N, wherein the N may be an odd or an even integer. A fractional indicator indicates a fractional divide ratio when one and an integral divide ratio when zero. A count indicator is asserted every N/2 input clock cycles when N is even. The count indicator is asserted alternately N/2 input clock cycles and then 1+N/2 input clock cycles when N is odd. The clock divider synthesizes one period of an output clock signal in response to each assertion of the count indicator for a fractional divide ratio and synthesizes one period of the output clock signal in response to two assertions of the count indicator for an integral divide ratio."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integer and half clock step division digital variable clock divider","description":"A clock divider divides a high speed input clock signal by an odd, even or fractional divide ratio. The clock divider receives a divide factor value F representative of a divide ratio N, wherein the N","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8532247","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8532247","citation_suggestion":"Patentable. \"Integer and half clock step division digital variable clock divider\" (US-8532247). https://patentable.app/patents/US-8532247","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8532247","json":"https://patentable.app/api/llm-context/US-8532247","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T16:50:12.982Z"}