{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8533245","patent":{"patent_number":"US-8533245","title":"Multipliers with a reduced number of memory blocks","assignee":null,"inventors":[],"filing_date":"2010-03-03T00:00:00.000Z","publication_date":"2013-09-10T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":21,"abstract":"Techniques for implementing multipliers using memory blocks in an integrated circuit (IC) are provided. The disclosed techniques may reduce the number of memory blocks required to implement various multiplication operations. A plurality of generated products is normalized. The normalized products are scaled to generate a plurality of scaled products. Scaled products with the least root mean square (RMS) error are identified. The scaled products with the least RMS error are then stored in a plurality of memory blocks in an IC. The scaled products may have a reduced number of bits compared to the plurality of generated products that have not been normalized and scaled."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Multipliers with a reduced number of memory blocks","description":"Techniques for implementing multipliers using memory blocks in an integrated circuit (IC) are provided. The disclosed techniques may reduce the number of memory blocks required to implement various mu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8533245","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8533245","citation_suggestion":"Patentable. \"Multipliers with a reduced number of memory blocks\" (US-8533245). https://patentable.app/patents/US-8533245","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8533245","json":"https://patentable.app/api/llm-context/US-8533245","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:03:12.464Z"}