{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8536008","patent":{"patent_number":"US-8536008","title":"Manufacturing method of vertical channel transistor array","assignee":null,"inventors":[],"filing_date":"2013-01-21T00:00:00.000Z","publication_date":"2013-09-17T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":13,"abstract":"A vertical channel transistor array has an active region formed by a plurality of semiconductor pillars. A plurality of embedded bit lines are arranged in parallel in a semiconductor substrate and extended along a column direction. A plurality of bit line contacts are respectively disposed on a side of one of the embedded bit lines. A plurality of embedded word lines are arranged in parallel above the embedded bit lines and extended along a row direction. Besides, the embedded word lines connect the semiconductor pillars in the same row with a gate dielectric layer sandwiched between the embedded word lines and the semiconductor pillars. The current leakage isolation structure is disposed at terminals of the embedded bit lines to prevent current leakage between the adjacent bit line contacts."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Manufacturing method of vertical channel transistor array","description":"A vertical channel transistor array has an active region formed by a plurality of semiconductor pillars. A plurality of embedded bit lines are arranged in parallel in a semiconductor substrate and ext","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8536008","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8536008","citation_suggestion":"Patentable. \"Manufacturing method of vertical channel transistor array\" (US-8536008). https://patentable.app/patents/US-8536008","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8536008","json":"https://patentable.app/api/llm-context/US-8536008","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:47:42.977Z"}