{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8537611","patent":{"patent_number":"US-8537611","title":"Natural threshold voltage distribution compaction in non-volatile memory","assignee":null,"inventors":[],"filing_date":"2012-06-14T00:00:00.000Z","publication_date":"2013-09-17T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C"],"num_claims":8,"abstract":"In a non-volatile memory system, a multi-phase programming operation is performed. In one phase, faster-programming storage elements have a higher bit line bias (Vbl) than slower-programming storage elements. In a next phase, the faster- and slower-programming storage elements have a lower Vbl. Further, a drain-side select gate voltage (Vsgd) can be adjusted in the different programming phases to accommodate the different Vbl levels. A higher Vsgd can be used in the one phase when Vbl is higher to avoid unnecessary stress on the SGD transistor and reduce power consumption. Vsgd can be reduced in the next phase when the lower Vbl is used. The higher Vbl is a slowdown measure which can be applied when the Vth of a storage element is between lower and upper verify levels of target data states, or throughout a programming phase."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Natural threshold voltage distribution compaction in non-volatile memory","description":"In a non-volatile memory system, a multi-phase programming operation is performed. In one phase, faster-programming storage elements have a higher bit line bias (Vbl) than slower-programming storage e","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8537611","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8537611","citation_suggestion":"Patentable. \"Natural threshold voltage distribution compaction in non-volatile memory\" (US-8537611). https://patentable.app/patents/US-8537611","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8537611","json":"https://patentable.app/api/llm-context/US-8537611","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T01:53:31.641Z"}