{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8539207","patent":{"patent_number":"US-8539207","title":"Lattice-based computations on a parallel processor","assignee":null,"inventors":[],"filing_date":"2006-11-03T00:00:00.000Z","publication_date":"2013-09-17T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"Circuits, methods, and apparatus that reduce the amount of data read from an external memory by a processor when performing calculations on data sets such as matrices or lattices. In one example, a computation algorithm is executed by threads running on a parallel processor such as a single-instruction, multiple-data processor, which stores computational data in on chip memories. Data to be processed by a group of threads is read from the external memory and stored in a first on-chip memory, while a copy of data to be processed at a later time by the group of threads is stored in a second on-chip memory. Data in the first on-chip memory is processed multiple times before being written to the external memory. Processing data multiple times and keeping a copy of data for later use reduces the amount of data to be retrieved from memory, thereby improving computational efficiency."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Lattice-based computations on a parallel processor","description":"Circuits, methods, and apparatus that reduce the amount of data read from an external memory by a processor when performing calculations on data sets such as matrices or lattices. In one example, a co","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8539207","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8539207","citation_suggestion":"Patentable. \"Lattice-based computations on a parallel processor\" (US-8539207). https://patentable.app/patents/US-8539207","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8539207","json":"https://patentable.app/api/llm-context/US-8539207","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:16:20.295Z"}