{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8539272","patent":{"patent_number":"US-8539272","title":"Reducing leakage current during low power mode","assignee":null,"inventors":[],"filing_date":"2010-07-08T00:00:00.000Z","publication_date":"2013-09-17T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":21,"abstract":"An apparatus is disclosed that may include an integrated circuit (IC) with an initialization bus configured to communicate with at least one low power mode latch operating during a initialization mode to set a value into the low power mode latch and configured to respond to the assertion of a low power mode signal by selecting the low power mode latch state to drive at least one logic gate to minimize leakage current during the low power mode. The IC may similarly configure and operate a RAM. A leakage control table may be used during initialization mode and created by other embodiments. The net list of a circuit block including at least part of the configuration block and lower power control latch may be used and/or modified to create a new net list to further minimize leakage current during low power mode. Installation packages and program systems are disclosed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Reducing leakage current during low power mode","description":"An apparatus is disclosed that may include an integrated circuit (IC) with an initialization bus configured to communicate with at least one low power mode latch operating during a initialization mode","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8539272","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8539272","citation_suggestion":"Patentable. \"Reducing leakage current during low power mode\" (US-8539272). https://patentable.app/patents/US-8539272","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8539272","json":"https://patentable.app/api/llm-context/US-8539272","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T05:12:19.807Z"}