{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8539284","patent":{"patent_number":"US-8539284","title":"Application reliability and fault tolerant chip configurations","assignee":null,"inventors":[],"filing_date":"2011-01-13T00:00:00.000Z","publication_date":"2013-09-17T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F"],"num_claims":10,"abstract":"An application can specify reliability values via a communication path between the application and the registers. Application reliability could increase if the application itself could specify the timeout and retry values. For instance, some errors might be prevented if the timeout value is lengthened by a short amount. A longer timeout value would result in slower performance because the memory component could not be accessed during the timeout period. However, resolving errors in memory devices would prevent unrecoverable error indicators from being returned to the application, which would in turn limit application and system crashes. Creating a communication path between the application and the hardware registers would allow the application to modify the reliability of memory operations."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Application reliability and fault tolerant chip configurations","description":"An application can specify reliability values via a communication path between the application and the registers. Application reliability could increase if the application itself could specify the tim","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8539284","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8539284","citation_suggestion":"Patentable. \"Application reliability and fault tolerant chip configurations\" (US-8539284). https://patentable.app/patents/US-8539284","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8539284","json":"https://patentable.app/api/llm-context/US-8539284","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T15:32:16.299Z"}