{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8539318","patent":{"patent_number":"US-8539318","title":"Power and pin efficient chip-to-chip communications with common-mode rejection and SSO resilience","assignee":null,"inventors":[],"filing_date":"2010-12-30T00:00:00.000Z","publication_date":"2013-09-17T00:00:00.000Z","cpc_codes":["H04L","H04L","H04L"],"num_claims":47,"abstract":"In bus communications methods and apparatus, a first set of physical signals representing the information to be conveyed over the bus is provided, and mapped to a codeword of a spherical code, wherein a codeword is representable as a vector of a plurality of components and the bus uses at least as many signal lines as components of the vector that are used, mapping the codeword to a second set of physical signals, wherein components of the second set of physical signals can have values from a set of component values having at least three distinct values for at least one component, and providing the second set of physical signals for transmission over the data bus in a physical form."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Power and pin efficient chip-to-chip communications with common-mode rejection and SSO resilience","description":"In bus communications methods and apparatus, a first set of physical signals representing the information to be conveyed over the bus is provided, and mapped to a codeword of a spherical code, wherein","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8539318","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8539318","citation_suggestion":"Patentable. \"Power and pin efficient chip-to-chip communications with common-mode rejection and SSO resilience\" (US-8539318). https://patentable.app/patents/US-8539318","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8539318","json":"https://patentable.app/api/llm-context/US-8539318","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T13:16:05.265Z"}