{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8541280","patent":{"patent_number":"US-8541280","title":"Semiconductor structure and method for manufacturing the same","assignee":null,"inventors":[],"filing_date":"2011-04-18T00:00:00.000Z","publication_date":"2013-09-24T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L"],"num_claims":11,"abstract":"The present invention provides a method for manufacturing a semiconductor structure, comprising the steps of: depositing an interlayer dielectric layer (105) on a semiconductor substrate (101) to cover a source/drain region (102) and a gate stack on the semiconductor substrate (101); etching the interlayer dielectric layer and the source/drain region, so as to form a contact hole (110) extending into the source/drain region; conformally forming an amorphous layer (111) on an exposed part of the source/drain region; forming a metal silicide layer (113) on a surface of the amorphous layer (111); and filling the contact hole (110) with a contact metal (114). Correspondingly, the present invention further provides a semiconductor structure. The present invention etches the source/drain region so that the exposed part comprises the bottom and a sidewall, thereby expanding the contact area between the contact metal in the contact hole and the source/drain region, and reducing the contact resistance. The present invention effectively eliminates EOR defects caused by the amorphous ion implantation by forming an amorphous substance by a selective deposition."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor structure and method for manufacturing the same","description":"The present invention provides a method for manufacturing a semiconductor structure, comprising the steps of: depositing an interlayer dielectric layer (105) on a semiconductor substrate (101) to cove","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8541280","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8541280","citation_suggestion":"Patentable. \"Semiconductor structure and method for manufacturing the same\" (US-8541280). https://patentable.app/patents/US-8541280","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8541280","json":"https://patentable.app/api/llm-context/US-8541280","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T23:05:31.756Z"}