{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8541286","patent":{"patent_number":"US-8541286","title":"Methods for fabricating integrated circuits","assignee":null,"inventors":[],"filing_date":"2012-02-17T00:00:00.000Z","publication_date":"2013-09-24T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":20,"abstract":"Methods are provided for forming semiconductor devices. One method includes forming a first layer overlying a bulk semiconductor substrate. A second layer is formed overlying the first layer. A first plurality of trenches is etched into the first and second layers. The first plurality of trenches is filled to form a plurality of support structures. A second plurality of trenches is etched into the first and second layers. Portions of the second layer disposed between adjacent trenches of the first and second pluralities of trenches define a plurality of fins. The first layer is etched to form gap spaces between the bulk semiconductor substrate and the plurality of fins. The plurality of fins is supported in position adjacent to the gap spaces by the plurality of support structures. The gap spaces are filled with an insulating material."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods for fabricating integrated circuits","description":"Methods are provided for forming semiconductor devices. One method includes forming a first layer overlying a bulk semiconductor substrate. A second layer is formed overlying the first layer. A first ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8541286","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8541286","citation_suggestion":"Patentable. \"Methods for fabricating integrated circuits\" (US-8541286). https://patentable.app/patents/US-8541286","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8541286","json":"https://patentable.app/api/llm-context/US-8541286","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:23:53.527Z"}