{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-8541833","patent":{"patent_number":"US-8541833","title":"Power transistor device vertical integration","assignee":null,"inventors":[],"filing_date":"2011-04-08T00:00:00.000Z","publication_date":"2013-09-24T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":14,"abstract":"A semiconductor component includes a sequence of layers, the sequence of layers including a first insulator layer, a first semiconductor layer disposed on the first insulator layer, a second insulator layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the second insulator layer. The semiconductor component also includes a plurality of devices at least partly formed in the first semiconductor layer. A first one of the plurality of devices is a power transistor formed in a first region of the first semiconductor layer and a first region of the second semiconductor layer. The first region of the first and second semiconductor layers are in electrical contact with one another through a first opening in the second insulator layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Power transistor device vertical integration","description":"A semiconductor component includes a sequence of layers, the sequence of layers including a first insulator layer, a first semiconductor layer disposed on the first insulator layer, a second insulator","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-8541833","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-8541833","citation_suggestion":"Patentable. \"Power transistor device vertical integration\" (US-8541833). https://patentable.app/patents/US-8541833","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-8541833","json":"https://patentable.app/api/llm-context/US-8541833","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T05:38:34.920Z"}