{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9589810","patent":{"patent_number":"US-9589810","title":"Manufacturing method of power MOSFET using a hard mask as a CMP stop layer between sequential CMP steps","assignee":null,"inventors":[],"filing_date":"2015-11-24T00:00:00.000Z","publication_date":"2017-03-07T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A manufacturing method of a power MOSFET employs a hard mask film over a portion of the wafer surface as a polishing stopper, between two successive polishing steps. After embedded epitaxial growth is performed in a state where a hard mask film for forming trenches is present in at least a scribe region of a wafer, primary polishing is performed by using the hard mask film as a stopper, and secondary polishing is then performed after the hard mask film is removed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Manufacturing method of power MOSFET using a hard mask as a CMP stop layer between sequential CMP steps","description":"A manufacturing method of a power MOSFET employs a hard mask film over a portion of the wafer surface as a polishing stopper, between two successive polishing steps. After embedded epitaxial growth is","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9589810","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9589810","citation_suggestion":"Patentable. \"Manufacturing method of power MOSFET using a hard mask as a CMP stop layer between sequential CMP steps\" (US-9589810). https://patentable.app/patents/US-9589810","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9589810","json":"https://patentable.app/api/llm-context/US-9589810","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:24:32.450Z"}