{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9594866","patent":{"patent_number":"US-9594866","title":"Method for checking and fixing double-patterning layout","assignee":null,"inventors":[],"filing_date":"2012-11-19T00:00:00.000Z","publication_date":"2017-03-14T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F"],"num_claims":20,"abstract":"A method includes receiving layout data representing a plurality of patterns. The layout data includes a plurality of layers and spaces identified between adjacent patterns. In at least one layer of the plurality of layers, the adjacent patterns violate a G0-rule. The method further includes determining whether each identified space is a critical G0-space. The identified space is determined to be a critical G0-space if a portion of at least one adjacent pattern that is removed merges two adjacent odd-loops of G0-spaces into a single even loop or G0 spaces or alternatively, if a portion of an adjacent pattern that is removed converts one odd-loop of G0-spaces to a non-loop of G0-spaces. The method further includes receiving a modification of at least one adjacent pattern and updating a spacing of a layer that is adjacent to the layers within the adjacent pattern that violate the G0-rule."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for checking and fixing double-patterning layout","description":"A method includes receiving layout data representing a plurality of patterns. The layout data includes a plurality of layers and spaces identified between adjacent patterns. In at least one layer of t","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9594866","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9594866","citation_suggestion":"Patentable. \"Method for checking and fixing double-patterning layout\" (US-9594866). https://patentable.app/patents/US-9594866","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9594866","json":"https://patentable.app/api/llm-context/US-9594866","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:36:22.239Z"}