{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9595308","patent":{"patent_number":"US-9595308","title":"Multiple-die synchronous insertion delay measurement circuit and methods","assignee":null,"inventors":[],"filing_date":"2016-03-31T00:00:00.000Z","publication_date":"2017-03-14T00:00:00.000Z","cpc_codes":["G11C","G06F","G11C"],"num_claims":16,"abstract":"Circuitry and methods are disclosed for accurately measuring a latency of a data path through multiple FIFO buffers on separate semiconductor dies. A base latency of each FIFO may be measured by measuring an average occupancy of the FIFO. The base latency of each FIFO may then be adjusted using quantities measured using the circuitry and methods disclosed herein. These quantities may include: the phase delay difference between FIFO read and write clocks; and the insertion delay for the FIFO read clock. Furthermore, an insertion delay difference of the sampling clock between the separate dies may be measured and used to adjust these quantities. Other embodiments and features are also disclosed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Multiple-die synchronous insertion delay measurement circuit and methods","description":"Circuitry and methods are disclosed for accurately measuring a latency of a data path through multiple FIFO buffers on separate semiconductor dies. A base latency of each FIFO may be measured by measu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9595308","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9595308","citation_suggestion":"Patentable. \"Multiple-die synchronous insertion delay measurement circuit and methods\" (US-9595308). https://patentable.app/patents/US-9595308","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9595308","json":"https://patentable.app/api/llm-context/US-9595308","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T03:51:24.749Z"}