{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9595318","patent":{"patent_number":"US-9595318","title":"Reduced level cell mode for non-volatile memory","assignee":null,"inventors":[],"filing_date":"2015-12-30T00:00:00.000Z","publication_date":"2017-03-14T00:00:00.000Z","cpc_codes":["G11C","G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G06F","G06F","G06F","G11C","G11C"],"num_claims":20,"abstract":"Apparatuses, systems, methods, and computer program products are disclosed for reduced level cell solid-state storage. A method includes determining that an erase block of a non-volatile storage device is to operate in a reduced level cell (RLC) mode. The non-volatile storage device may be configured to store at least three bits of data per storage cell. A method includes instructing the non-volatile storage device to program first and second pages of the erase block with data. A method includes instructing the non-volatile storage device to program a third page of the erase block with a predefined data pattern. Programming of a predefined data pattern may be configured to adjust which abodes of the erase block are available to represent stored user data values."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Reduced level cell mode for non-volatile memory","description":"Apparatuses, systems, methods, and computer program products are disclosed for reduced level cell solid-state storage. A method includes determining that an erase block of a non-volatile storage devic","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9595318","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9595318","citation_suggestion":"Patentable. \"Reduced level cell mode for non-volatile memory\" (US-9595318). https://patentable.app/patents/US-9595318","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9595318","json":"https://patentable.app/api/llm-context/US-9595318","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:21:55.795Z"}