{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9595345","patent":{"patent_number":"US-9595345","title":"Adaptive selective bit line pre-charge for current savings and fast programming","assignee":null,"inventors":[],"filing_date":"2014-08-07T00:00:00.000Z","publication_date":"2017-03-14T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"Techniques are provided for efficiently performing programming operations in a memory device. In particular, power consumption is reduced in sensing circuitry by avoiding pre-charging of bit lines for certain memory cells at certain times during a programming operation. One approach uses knowledge of the different phases of a programming operation to reduce the number of unnecessary bit line pre-charges. For example, during the lower program loop numbers of a programming operation, bit line pre-charging may occur for lower data states but not for higher data states. Similarly, during the higher program loop numbers, bit line pre-charging may occur for higher data states but not for lower data states. In another approach, which may or may not incorporate knowledge of the different phases of a programming operation, the setting of the bit line pre-charge can be updated at least once after it is initially set in the verify portion."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Adaptive selective bit line pre-charge for current savings and fast programming","description":"Techniques are provided for efficiently performing programming operations in a memory device. In particular, power consumption is reduced in sensing circuitry by avoiding pre-charging of bit lines for","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9595345","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9595345","citation_suggestion":"Patentable. \"Adaptive selective bit line pre-charge for current savings and fast programming\" (US-9595345). https://patentable.app/patents/US-9595345","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9595345","json":"https://patentable.app/api/llm-context/US-9595345","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T12:20:57.750Z"}