{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9595479","patent":{"patent_number":"US-9595479","title":"Method and structure of three dimensional CMOS transistors with hybrid crystal orientations","assignee":null,"inventors":[],"filing_date":"2014-03-18T00:00:00.000Z","publication_date":"2017-03-14T00:00:00.000Z","cpc_codes":["H01L","A61B","H01L","H01L"],"num_claims":18,"abstract":"A method for fabricating a three-dimensional integrated circuit device includes providing a first substrate having a first crystal orientation, forming at least one or more PMOS devices overlying the first substrate, and forming a first dielectric layer overlying the one or more PMOS devices. The method also includes providing a second substrate having a second crystal orientation, forming at least one or more NMOS devices overlying the second substrate, and forming a second dielectric layer overlying the one or more NMOS devices. The method further includes coupling the first dielectric layer to the second dielectric layer to form a hybrid structure including the first substrate overlying the second substrate."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and structure of three dimensional CMOS transistors with hybrid crystal orientations","description":"A method for fabricating a three-dimensional integrated circuit device includes providing a first substrate having a first crystal orientation, forming at least one or more PMOS devices overlying the ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9595479","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9595479","citation_suggestion":"Patentable. \"Method and structure of three dimensional CMOS transistors with hybrid crystal orientations\" (US-9595479). https://patentable.app/patents/US-9595479","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9595479","json":"https://patentable.app/api/llm-context/US-9595479","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T16:29:57.334Z"}