{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9595530","patent":{"patent_number":"US-9595530","title":"Methods and apparatus for vertical bit line structures in three-dimensional nonvolatile memory","assignee":null,"inventors":[],"filing_date":"2016-07-07T00:00:00.000Z","publication_date":"2017-03-14T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C"],"num_claims":20,"abstract":"A method is provided that includes forming a first vertical bit line disposed in a first direction above a substrate, forming a first word line disposed in a second direction above the substrate, the second direction perpendicular to the first direction, forming a first memory cell comprising a nonvolatile memory material at an intersection of the first vertical bit line and the first word line, forming a transistor above the substrate, and forming a first bit line select device coupled between the first vertical bit line and the transistor."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods and apparatus for vertical bit line structures in three-dimensional nonvolatile memory","description":"A method is provided that includes forming a first vertical bit line disposed in a first direction above a substrate, forming a first word line disposed in a second direction above the substrate, the ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9595530","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9595530","citation_suggestion":"Patentable. \"Methods and apparatus for vertical bit line structures in three-dimensional nonvolatile memory\" (US-9595530). https://patentable.app/patents/US-9595530","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9595530","json":"https://patentable.app/api/llm-context/US-9595530","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:05:01.345Z"}