{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9601211","patent":{"patent_number":"US-9601211","title":"Semiconductor memory device","assignee":null,"inventors":[],"filing_date":"2016-04-22T00:00:00.000Z","publication_date":"2017-03-21T00:00:00.000Z","cpc_codes":["G11C","G06F","G06F","G11C","G11C"],"num_claims":10,"abstract":"A semiconductor memory device may include a memory cell array, two or more global word lines, and two or more path circuits. The two or more global word lines may be coupled to word lines in parallel. At least one of the two or more path circuits may be coupled between portions of each word line portions of each word line. Each path circuit may couple one of the global word lines to one of the word lines."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor memory device","description":"A semiconductor memory device may include a memory cell array, two or more global word lines, and two or more path circuits. The two or more global word lines may be coupled to word lines in parallel.","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9601211","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9601211","citation_suggestion":"Patentable. \"Semiconductor memory device\" (US-9601211). https://patentable.app/patents/US-9601211","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9601211","json":"https://patentable.app/api/llm-context/US-9601211","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:03:56.511Z"}